1. Technical Field
Exemplary embodiments of the present invention relate to a semiconductor memory device, and more particularly, to a semiconductor memory device capable of reducing current in a partial array self-refresh (PASR) mode.
2. Description of Related Art
A semiconductor memory device, such as a dynamic random access memory (DRAM), may periodically perform a refresh operation in order to prevent data loss due to, for example, charge leak in memory capacitors. The semiconductor memory device may consume a large current during the refresh operation. Particularly, current consumed by the semiconductor memory device during a self-refresh operation in which a refresh operation is performed at predetermined time intervals in a standby or power-down mode may represent a large portion of the entire current consumption. Accordingly, when the semiconductor memory device is implemented in a portable apparatus that is significantly affected by current consumption, it is necessary to reduce current consumption during the self-refresh operation.
As the capacity of semiconductor memory devices has increased, a multi-bank semiconductor memory device including a plurality of banks has conventionally been adopted. In order to reduce current consumption during a self-refresh operation of a multi-bank semiconductor memory device, a partial array self-refresh (PASR) method has been proposed. The PASR method may involve refreshing less than all memory cells of a semiconductor memory device.
A typical PASR operation includes self-refreshing individual banks. For example, when a multi-bank semiconductor memory device including a plurality of banks enters a PASR mode, only some banks of the plurality of banks may be self-refreshed, while the remaining banks may not be self-refreshed. In this case, banks that are not self-refreshed may lose data, thereby reducing current consumption.
A method of dividedly storing data in a plurality of banks instead of storing the data in bank units has been adopted in order to improve data input/output operations. In this case, a data read/write operation includes sequentially activating banks while changing bank addresses to increase the operating speed of a semiconductor memory device more than a data read/write operation including changing word lines of one bank.